Controlling bandwidth allocations in a system on a chip (SoC)
US9075952B2 · kind B2 · utility
6Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2013 |
| Grant date | Jul 7, 2015 |
| Priority date | — |
| Expiry date | Feb 15, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2141
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a fabric of a processor such as a system on a chip includes at least one data buffer including a plurality of entries each to store data to be transferred to and from a plurality of agents and to and from a memory, a request tracker to maintain track of pending requests to be output to an ordered domain of the fabric, and an output throttle logic to control allocation into the ordered domain between write transactions from a core agent and read completion transactions from the memory. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.