Systems and methods for rapid erasure retry decoding
US9076492B2 · kind B2 · utility
1Cited by
39References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2012 |
| Grant date | Jul 7, 2015 |
| Priority date | — |
| Expiry date | Aug 30, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/45
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Data processing systems, circuits and methods are disclosed. As one example, a data processing system is disclosed that includes: a buffer circuit, a data processing circuit, and an erasure window set circuit. The buffer circuit is operable to store a data set as a buffered data set, and the data processing circuit is operable to repeatedly apply a data processing algorithm to the buffered data set. The erasure window set circuit is operable to define a location of the erasure window in relation to the buffered data set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.