High-voltage transistor device and production method
US9076676B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 21, 2012 |
| Grant date | Jul 7, 2015 |
| Priority date | — |
| Expiry date | Nov 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/126
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A body region (3) with a first type of electric conductivity is arranged at the upper surface (10) of a substrate (1) in a well (2), wherein a portion of the well that is not occupied by the body region has a second type of conductivity opposite the first type of conductivity. At the upper surface, a source region is arranged in the body region and a drain region is arranged in the well at a distance from the body region; the source region and the drain region both have the second type of conductivity. The body region is arranged underneath a surface area of the upper surface that has a border (7) with opposing first border sides (8). The well has a varying depth in the substrate. The depth of the well is smaller underneath the first border sides of the body region than in a portion of the body region that is spaced apart from the first border sides.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.