Patent · US Active

Integrated circuit die stacks having initially identical dies personalized with fuses and methods of manufacturing the same

US9076770B2 · kind B2 · utility

15Cited by
47References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 8, 2012
Grant dateJul 7, 2015
Priority date
Expiry dateJul 14, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/3011
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by blowing fuses on the first die, converting the TSVs previously connected through the blown fuses into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by blowing fuses on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.