Semiconductor device and a method of manufacturing same
US9076774B2 · kind B2 · utility
1Cited by
1References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 2013 |
| Grant date | Jul 7, 2015 |
| Priority date | — |
| Expiry date | May 15, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a semiconductor device where a metal circuit layer is disposed over a main planar surface of an insulating substrate, a semiconductor chip is connected by way of a solder over the metal circuit layer, and a metal wiring is connected over the metal circuit layer, in which a solder flow prevention area comprising a linear oxide material is formed between the semiconductor chip and the ultrasonic metal bonding region over the metal circuit layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.