Automatic detection and compensation of frequency offset in point-to-point communication
US9077349B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2012 |
| Grant date | Jul 7, 2015 |
| Priority date | — |
| Expiry date | Jul 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0025
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems and methods for automatic detection and compensation of frequency offset in point-to-point communication. A burst mode clock and data recovery (CDR) system comprises input data received at a first frequency and a reference clock operating at a second frequency. A master phase-locked loop (PLL) comprising a first gated voltage controlled oscillator (GVCO) is configured to align the phases of reference clock and the input data, and provide phase error information and a recovered clock. A second GVCO is controlled by the recovered clock to sample the input data. A frequency alignment loop comprising a feedback path from the second GVCO to the master PLL is configured to use the phase error information to correct a frequency offset between the first frequency and the second frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.