Attenuated primary reflection integrated optical circuit
US9081136B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2013 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Sep 1, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B6/30
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An integrated optical circuit includes a substrate having an input face, an output face, a lower face and an upper face, at least one optical waveguide having a first waveguide end located on the input face of the substrate and a second waveguide end located on the output face of the substrate. The lower face of the substrate includes a first part that is planar and parallel to the upper face and an optical block, the optical block being positioned in the median plane and in the incidence plane, the optical block forming a protrusion at least at the primary reflection point of the integrated optical circuit with respect to the first planar part of the lower face and the optical block being capable of receiving and attenuating at least one non-guided optical beam propagating on the optical path of a primary reflection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.