Patent · US Active

Voltage regulator having input stage and current mirror

US9081404B2 · kind B2 · utility

3Cited by

8References

14Claims

0Family size

Assignee

Infineon Technologies Austria AG · AT

Inventors

Thomas Jackum · Graz, AT
Frank Praemassing · Ratingen, DE
Stefan Berger · Raubling, DE
Elmar Bach · Villach, AT
Albert Missoni · Graz, AT

Key dates

Filing date	Apr 13, 2012
Grant date	Jul 14, 2015
Priority date	—
Expiry date	Nov 22, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG05F1/56
WIPO fieldControl
WIPO sectorInstruments

Abstract

A voltage regulator includes an output stage including a control terminal and a load path, with the load path coupled between the input terminal and the output terminal. The voltage regulator also includes a control circuit with an input stage, a first current mirror, and a second current mirror. The input stage includes a first control input configured to receive a first reference voltage, a second control input configured to receive a second reference voltage, a feedback input coupled to the output terminal, a first output terminal, and a second output terminal. The first current mirror includes a reference current path coupled between a first supply terminal and the first output terminal of the input stage, and an output current path coupled between the first supply terminal and the control terminal of the pass device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.