Apparatus and method for tracking TLB flushes on a per thread basis
US9081707B2 · kind B2 · utility
26Cited by
4References
21Claims
0Family size
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Key dates
| Filing date | Dec 29, 2012 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Jun 28, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is described that includes recognizing that TLB information of one or more hardware threads is to be invalidated. The method also includes determining which ones of the one or more hardware threads are in a state in which TLB information is flushed. The method also includes directing a TLB shootdown to those of the or more hardware threads that are in a state in which TLB information is not flushed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.