Semiconductor devices having image sensor and memory device operation modes
US9082368B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2013 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Jan 1, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4016
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device may include a plurality of banks; and a control unit configured to receive a command from an external device and independently control the plurality of banks according to the received command. Each bank comprises a pixel array including a plurality of pixels; a row decoder configured to activate word lines connected to the plurality of pixels under control of the control unit; a column decoder configured to activate bit lines connected to the plurality of pixels under control of the control unit; a sense amplifier and write driver configured to control and detect respective voltages of the activated bit lines to provide respective amplified voltages; and an input/output buffer configured to output data states of the pixels based on the respective amplified voltages. Related methods of operation are also discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.