Manufacturing method of metal wire and thin transistor array panel, and organic light emitting diode display
US9082731B2 · kind B2 · utility
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Key dates
| Filing date | Mar 21, 2014 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Mar 21, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1201
Abstract
A manufacturing method of a wire including: forming a lower layer on a substrate; forming a middle layer on the lower layer; forming an upper layer on the middle layer; forming, exposing, and developing a photoresist layer on the upper layer to form a photoresist pattern; and etching the upper layer, the middle layer, and the lower layer by using the photoresist pattern as a mask to form a wire such that the upper layer covers an end of the middle layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.