Fault condition of detection circuit
US9084304B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2012 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Feb 22, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05B41/2985
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A ballast comprises an inverter having a transformer comprising a core, a primary winding, and a secondary winding for connecting to a lamp and providing voltage thereto. The ballast includes a fault condition detection circuit connected to the inverter for disabling the inverter to discontinue energization of the lamp when a fault condition occurs. The fault condition detection circuit comprises an other primary winding wound on the core of the transformer for receiving a voltage signal proportional to a voltage across the secondary winding, a voltage blocking circuit connected to the other primary winding for receiving the voltage signal from the other primary winding, and a capacitor connected between the voltage blocking circuit and ground potential. The voltage blocking circuit is configured to selectively conduct and block the received voltage signal as a function of the frequency of the received voltage signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.