Patent · US Active

Apparatus to access multi-bank memory

US9086959B2 · kind B2 · utility

1Cited by
4References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 12, 2010
Grant dateJul 21, 2015
Priority date
Expiry dateMar 11, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/0292
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method of controlling access to a multi-bank memory, and an apparatus to perform the method, is provided. For the access control, a stride register is provided to store stride values determined by a processor during a run time. A memory controller controls access to a logical block in row and column directions, in an interleaved manner, the logical block having a width determined according to the stride values stored in the stride register. Accordingly, simultaneous access to a plurality of pieces of data at successive addresses adjacent in the row and column directions may be made.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.