Semiconductor device and method of manufacturing the same
US9087816B2 · kind B2 · utility
1Cited by
5References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2014 |
| Grant date | Jul 21, 2015 |
| Priority date | — |
| Expiry date | Feb 26, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To achieve a reduction in cost of a semiconductor device, in a common board (a wiring board), a plurality of bonding leads each extend toward the center of the board, and a solder resist film as a die bonding region supporting a minimum chip is coated with a die bonding material. With this, even when a first semiconductor chip as a large chip is mounted, wire bonding can be performed without causing the die bonding material to cover the bonding leads. Thus, development cost can be reduced to reduce the cost of the semiconductor device (LGA).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.