Slot-shielded coplanar strip-line compatible with CMOS processes
US9087840B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2010 |
| Grant date | Jul 21, 2015 |
| Priority date | — |
| Expiry date | Sep 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A strip-line includes a ground plane extending through a plurality of dielectric layers over a substrate; a signal line over the substrate and on a side of the ground plane; a first plurality of metal strips under the signal line and in a first metal layer, wherein the first plurality of metal strips is parallel to each other, and is spaced apart from each other by spaces; and a second plurality of metal strips under the signal line and in a second metal layer over the first metal layer. The second plurality of metal strips vertically overlaps the spaces. The first plurality of metal strips is electrically coupled to the second plurality of metal strips through the ground plane, and no via physically contacts the first plurality of metal strips and the second plurality of metal strips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.