Removing metal fills in a wiring layer
US9087880B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2014 |
| Grant date | Jul 21, 2015 |
| Priority date | — |
| Expiry date | Jul 11, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a semiconductor manufacturing method, a mask forming method and a semiconductor structure. According to one aspect of the invention, a semiconductor manufacturing method is provided, comprising: forming a metal wiring layer on a semiconductor substrate, the metal wiring layer comprising dielectrics and metal wires and metal FILLs within the dielectrics; removing the metal FILLs in the metal wiring layer completely to form the metal wiring layer without the metal FILLs. With the technical solution according to embodiments of the invention, undesirable influences due to metal FILLs will be eliminated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.