RF transmitter architecture, integrated circuit device, wireless communication unit and method therefor
US9088319B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2012 |
| Grant date | Jul 21, 2015 |
| Priority date | — |
| Expiry date | Jan 2, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/0425
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A radio frequency (RF) transmitter architecture includes at least one digital signal processing module. The at least one digital signal processing module is configurable to operate in at least a first mode wherein the at least one digital signal processing module is arranged to receive a digital input signal, select, from a reduced set of digital power amplifier (DPA) control values, a plurality of DPA control values based at least partly on the received digital input signal, perform interpolation of the plurality of selected DPA control values to determine a DPA control value from a non-reduced set of DPA control values representative of the received digital input signal, and output to at least one DPA component the determined DPA control value representative of the received digital input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.