Multi-core processor system, computer product, and control method for interrupt execution
US9092255B2 · kind B2 · utility
2Cited by
3References
6Claims
0Family size
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Key dates
| Filing date | Sep 27, 2012 |
| Grant date | Jul 28, 2015 |
| Priority date | — |
| Expiry date | Nov 8, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-core processor system includes a given configured to queue an interrupt process of a software interrupt request to the given core, and execute queued processes in the order of queuing at the given core; execute preferentially an interrupt process of a hardware interrupt request to the given core over a process under execution at the given core; determine whether the software interrupt request is a specific software interrupt request; and perform control to preferentially execute the interrupt process without queuing, upon determining that the software interrupt request is the specific software interrupt request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.