Patent · US Active

Storage of codeword portions

US9092349B2 · kind B2 · utility

2Cited by

3References

22Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Jonathan E. Schmidt · San Antonio, US
Scott Nelson · Vancouver, CA
Zion S. Kwok · Burnaby, CA

Key dates

Filing date	Dec 14, 2011
Grant date	Jul 28, 2015
Priority date	—
Expiry date	Aug 11, 2032

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/42
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments of the present disclosure describe device, methods, computer-readable media and system configurations for dividing error correcting code (“ECC”) codewords into portions and storing the portions among multiple die of non-volatile memory (“NVM”). For example, a device may include memory including a first die and a second die, and a memory controller configured to store a first portion of a codeword for use with an error correcting code in a first segment of the first die and to store a second portion of the codeword in a first segment of the second die. In various embodiments, the first segment of the second die may be offset from the first segment of the first die. Other embodiments may be described and/or claimed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.