Patent · US Revoked

Isolating a PCI host bridge in response to an error event

US9092399B2 · kind B2 · utility

0Cited by
9References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 12, 2013
Grant dateJul 28, 2015
Priority date
Expiry dateDec 11, 2033

Classification

  • Technology area (CPC —)General

Abstract

Instead of disabling PCI communication between system resources in a host computing device and I/O devices when a PCI Host Bridge (PHB) is unable to function, the host computing device may include a redundant PCI communication path for maintaining communication between the system resources and the I/O devices after a first PHB experiences an unrecoverable error. In one embodiment, the redundant PCI communication path includes a second PHB that is maintained in a standby state so long as the first PHB is functioning normally. However, once the first PHB experiences an unrecoverable error, the second PHB is changed to the master state and assumes the responsibility for maintaining communication between the system resources and the I/O devices.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.