Semiconductor devices including a gate structure between active regions, and methods of forming semiconductor devices including a gate structure between active regions
US9093297B2 · kind B2 · utility
2Cited by
4References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 1, 2013 |
| Grant date | Jul 28, 2015 |
| Priority date | — |
| Expiry date | Feb 25, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices are provided. The semiconductor devices may include an isolation pattern and first, second, and third active regions of a substrate. The first active region may be spaced apart from the second active region by a first width of the isolation pattern in a direction. A gate structure may be between the first and second active regions and may include a second width wider than the first width of the isolation pattern in the direction. Related methods of forming semiconductor devices are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.