Using bump bonding to distribute current flow on a semiconductor power device
US9093433B2 · kind B2 · utility
1Cited by
5References
37Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 3, 2011 |
| Grant date | Jul 28, 2015 |
| Priority date | — |
| Expiry date | Oct 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor power chip may have a semiconductor die having a power device fabricated on a substrate thereof, wherein the power device has at least one first contact element, a plurality of second contact elements and a plurality of third contact elements arranged on top of the semiconductor die; a plurality of ball bumps or a loaf bump disposed on each of the plurality of second elements and the plurality of third elements; and at least one ball bump or loaf on the at least one first contact element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.