Patent · US Active

In situ pulse-based delay variation monitor predicting timing error caused by process and environmental variation

US9094002B2 · kind B2 · utility

1Cited by
2References
11Claims
0Family size

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Key dates

Filing dateNov 1, 2013
Grant dateJul 28, 2015
Priority date
Expiry dateNov 1, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/0963
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An in situ pulse-based delay variation monitor that predicts timing errors caused by process and environmental variations is revealed. The monitor includes a sequential storage device having a mater storage device and a slave storage device, a transition detector that is electrically connected to a node set on an electrical connection pathway from a master storage device to the slave storage device, and a warning signal generator electrically connected to the transition detector. The transition detector receives output of the master storage device to form a warning area by delay buffer, and generates a pulse width output correspondingly according to transition of the data input. Thus the warning signal generator generates a warning signal according to logic action at the pulse width and the clock input when the data input reaches the warning area. Thereby timing errors caused by static process variations and dynamic environmental variations are predicted.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.