Methods of time sychronisation in communications networks
US9094142B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2011 |
| Grant date | Jul 28, 2015 |
| Priority date | — |
| Expiry date | Oct 3, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0061
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method 10 of providing a path delay asymmetry for time synchronization between a master clock at a first client node and a slave clock at a second client node across a server communications network. The method comprises: mapping a first time protocol signal (TPS) carrying master clock time protocol data onto a first transmission signal, determining a forward mapping delay, dmf, and providing dmf to a path delay asymmetry calculation element 12; mapping a second TPS carrying slave clock time protocol data onto a second transmission signal, determining a reverse mapping delay, dmr, and providing the dmr to the patch delay asymmetry calculation element 14; applying FEC to the first transmission signal, determining a forward FEC delay, dfecf, and providing the dfecf to the path delay asymmetry calculation element 16; applying FEC to the second transmission signal, determining a reverse FEC delay, dfecr, and providing dfecr to the path delay asymmetry calculation element 18; calculating a path delay asymmetry in dependence on dmf, dmr, dfecf and dfecr 20; and providing the path delay asymmetry to a time protocol client at the second client node 22.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.