Channel estimation processing for performance improvement in low SNR regime
US9094241B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2011 |
| Grant date | Jul 28, 2015 |
| Priority date | — |
| Expiry date | Dec 28, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0256
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Disclosed is an improved channel estimation by post-processing of the channel response that is generated by a Golay correlator The processing is done using time-domain operations such as gating and filtering. Gating is performed on the estimated channel response taps in order to reduce the noise level. Pre-filtering the channel response through a filter matched to the transmitted pulse-shape improves the probability of detecting the channel peaks. Post-filtering the processed channel impulse response to eliminate the high frequency effects that are added by the windowing and gating operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.