System and method for omitting a clock pulse from a clock signal in response to a change in current consumption
US9098260B2 · kind B2 · utility
2Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2012 |
| Grant date | Aug 4, 2015 |
| Priority date | — |
| Expiry date | Jul 22, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the present disclosure are directed to managing load steps caused by processing circuitry. The processing circuitry may generate a series of clock pulses at an average clock period. The processing circuitry may estimate a current consumption of the processing circuitry at each clock pulse. Accordingly, a clock pulse from the series of clock pulses may be omitted when a change in the current consumption exceeds a predetermined threshold amount, thereby increasing the average clock period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.