Using different programming modes to store data to a memory cell
US9099185B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2013 |
| Grant date | Aug 4, 2015 |
| Priority date | — |
| Expiry date | Jan 31, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with some embodiments, a memory cell is provided with a plurality of available programming states to accommodate multi-level cell (MLC) programming. A control circuit stores a single bit logical value to the memory cell using single level cell (SLC) programming to provide a first read margin between first and second available programming states. The control circuit subsequently stores a single bit logical value to the memory cell using virtual multi-level cell (VMLC) programming to provide a larger, second read margin between the first available programming state and a third available programming state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.