Dual time alignment architecture for transmitters using EER/ET amplifiers and others
US9099966B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 21, 2011 |
| Grant date | Aug 4, 2015 |
| Priority date | — |
| Expiry date | Nov 23, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method linearize a power amplifier in a transmitter by using a dual time alignment scheme. A first adjustable time delay unit delays a modulator signal input of a power amplifier. A first time delay estimator estimates a time delay between the delayed feedback signal and the reference signal, and adjusts the first adjustable time delay unit based on the estimated time delay between the delayed feedback signal and the reference signal. A second adjustable time delay unit delays the feedback signal. And a second time delay estimator estimates the time delay between the delayed feedback signal and the reference signal, and adjusts the second adjustable time delay unit based on the estimated time delay between the delayed feedback signal and the reference signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.