Patent · US Active

Synchronizing VPLS gateway MAC addresses

US9100213B1 · kind B1 · utility

15Cited by
32References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 8, 2011
Grant dateAug 4, 2015
Priority date
Expiry dateJun 4, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L2101/622
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

In general, techniques are described for synchronizing gateway layer two (L2) addresses of routers that cooperate to provide interconnectivity to multiple, separate L2 networks. In one example, a router includes a VPLS module that establishes a VPLS instance to provide L2 connectivity between a local L2 network for the router and a remote L2 network for the router, wherein the router is addressable by a gateway L2 address. A synchronization module receives a gateway L2 address synchronization message that includes an additional gateway L2 address for an additional router. An integrated routing and bridging (IRB) interface of the router receives a L2 PDU from the local L2 network on an attachment circuit for the VPLS instance attached to the interface card, and a forwarding unit routes a layer three (L3) packet carried by the PDU when the PDU has an L2 destination address that matches the additional gateway L2 address.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.