Predict computing platform memory power utilization
US9104409B2 · kind B2 · utility
11Cited by
17References
17Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 1, 2010 |
| Grant date | Aug 11, 2015 |
| Priority date | — |
| Expiry date | Apr 5, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3225
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method to reduce memory power consumption for a computing platform includes inspecting an operating parameter associated with a resource of the computing platform that is updated by the resource of the computing platform during runtime of the computing platform. Memory power utilization is then predicted for the computing platform during the runtime of the computing platform based at least in part on the operating parameter. A current power state of at least one memory module resident on the computing platform is transitioned to one of a plurality of power states based on the predicting of the memory power utilization.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.