Semiconductor overlay production system and method
US9104831B2 · kind B2 · utility
1Cited by
5References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 23, 2013 |
| Grant date | Aug 11, 2015 |
| Priority date | — |
| Expiry date | Aug 23, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is a system and method for producing semiconductor devices using overlays, the method comprising associating one or more patterned overlays with respective ones of reserved regions in a layer template, receiving a layer design based on the layer template, identifying the reserved regions in the layer design, generating a production layer design based on the layer design, the production layer design describing at least one production overlay in one of the reserved regions, and fabricating one or more devices based on the production layer design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.