Hardware enablement using an interface
US9104894B2 · kind B2 · utility
6Cited by
16References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2005 |
| Grant date | Aug 11, 2015 |
| Priority date | — |
| Expiry date | Jun 10, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318572
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A hardware enablement apparatus includes a processor, and a communications interface configured for writing license data to one or more data registers and for using the license data to selectively enable, under control of the processor, hardware features associated with the data registers, at least one of the data registers being implemented in non-volatile memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.