Array substrate, display device and method for driving pixels within each pixel region of the array substrate
US9105248B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2013 |
| Grant date | Aug 11, 2015 |
| Priority date | — |
| Expiry date | Dec 28, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0233
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure provide an array substrate comprising a plurality of gate lines, a plurality of data lines, and pixel regions each of which is defined by intersecting one gate line and two neighboring data lines among the plurality of gate lines and the plurality of data lines wherein two thin film transistors (TFTs) are formed at the intersections between the gate line and the two neighboring data lines in each pixel region, a first pixel electrode and a second pixel electrode are alternately arranged in each pixel region. A first thin film transistor of the two thin film transistors is coupled to the first pixel electrode, a second thin film transistor of the two thin film transistors is coupled to the second pixel electrode. The two neighboring data lines participating in defining a pixel region comprise a first data line coupling to the first thin film transistor and a second data line coupling to the second thin film transistor. Voltages having the same absolute value and opposite polarities are applied to the first pixel electrode and the second pixel electrode respectively via the first thin film transistor and the second thin film transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.