Sorting decoder
US9106238B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2013 |
| Grant date | Aug 11, 2015 |
| Priority date | — |
| Expiry date | Mar 15, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A sorting decoder captures the rank-order of a set of input analog signals in the digital domain using simple logic components such as self-timed first state elements, without requiring conventional analog-to-digital signal converters. The analog signals are each compared against a monotonic dynamic reference and the resulting comparisons are snapshot by a self-timed first state element for each input signal, or the last member of a sorted collection of input signals, at the time when it reaches the reference signal, so that a different snapshot representing the signal value ranking relative to the other signal values is produced for each input signal. The resulting rank-order estimation snapshots are binary signals that can then be further processed by a simple sorting logic circuit based on elementary logic components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.