Multiplying digital-to-analog converter and pipeline analog-to-digital converter using the same
US9106240B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 7, 2014 |
| Grant date | Aug 11, 2015 |
| Priority date | — |
| Expiry date | Oct 7, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/468
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multiplying digital-to-analog converter (MDAC) with high slew rate and a pipeline Analog-to-digital converter using the same. The first set of capacitors for a first input terminal of the operational amplifier (op-amp) includes active capacitors coupling the first input terminal of the op-amp to a first enhanced reference voltage or a common mode terminal in accordance with first digital bits in an amplifying phase of the MDAC, and includes a feedback capacitor coupling the first input terminal of the op-amp to a first output terminal of the op-amp in the amplifying phase. The first set of capacitors contains M capacitor cells. The feedback capacitor between the first set of capacitors contains at most M/(2n) capacitor cells, where n is a number of effective bits provided by a first analog-to-digital converter generating the first digital bits for the active capacitors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.