Method for JTAG-driven remote scanning
US9110137B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2013 |
| Grant date | Aug 18, 2015 |
| Priority date | — |
| Expiry date | Dec 3, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/267
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A scan circuit (JTAG 1149 extension) for a microprocessor utilizes transport logic and scan chains which operate at a faster clock speed than the external JTAG clock. The transport logic converts the input serial data stream (TDI) into input data packets which are sent to scan chains, and converts output data packets into an output data stream (TDO). The transport logic includes a deserializer having a sliced input buffer, and a serializer having a sliced output buffer. The scan circuit can be used for testing with boundary scan latches, or to control internal functions of the microprocessor. Local clock buffers can be used to distribute the clock signals, controlled by thold signals generated from oversampling of the external clock. The result is a JTAG scanning system which is not limited by the external JTAG clock speed, allowing multiple internal scan operations to complete within a single external JTAG cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.