Memory combination and computer system using the same
US9110640B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Mar 5, 2013 |
| Grant date | Aug 18, 2015 |
| Priority date | — |
| Expiry date | Aug 9, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/185
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory combination includes a first riser board, a second riser board, a pivotal plate, a first engaging member, and a second engaging member. The first riser board has a first edge and a second edge parallel to each other. The second riser board has a third edge and a fourth edge parallel to each other. The pivotal plate are pivotally connected to the first riser board to be adjacent to the first edge and to the second riser board to be adjacent to the third edge. The first and second engaging members are respectively disposed on the first and second riser boards to be respectively adjacent to the second and fourth edges. When the first and second riser boards rotate to be perpendicular to the pivotal plate, the first engaging member is engaged with the second engaging member.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.