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US9110721B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2012 |
| Grant date | Aug 18, 2015 |
| Priority date | — |
| Expiry date | Feb 6, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/9047
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method executed by a controller of a plurality of processing elements to reduce processing time of a data packet in a network element. The processing elements are arranged in a matrix. Each processing element has a point to point connection with each adjacent processing element, known as a hop. Each processing element also includes a separate processing element storage. The data packet includes a data and a descriptor, the data being transmitted to a first processing element for storage before the descriptor is received by the controller, and the data being processed after the descriptor is received. The method includes receiving the descriptor at the controller, determining that the first processing element does not have an available resource for processing the data, determining a second processing element based on a least number of hops to the first processing element, and transmitting the descriptor to the second processing element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.