Frequency arrangement for surface code on a superconducting lattice
US9111230B2 · kind B2 · utility
11Cited by
8References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2013 |
| Grant date | Aug 18, 2015 |
| Priority date | — |
| Expiry date | Sep 7, 2033 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB82Y10/00
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A device lattice arrangement including a plurality of devices, a plurality of physical connections for the plurality of devices, wherein each of the plurality of devices are coupled to at least two of the plurality of physical connections, a plurality of identity labels associated with individual devices of the plurality of devices and an arrangement of identity labels such that pairs of devices of the plurality of devices connected by some number of the plurality of connections have different identity labels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.