Power semiconductor device and fabrication method thereof
US9111770B2 · kind B2 · utility
8Cited by
2References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2014 |
| Grant date | Aug 18, 2015 |
| Priority date | — |
| Expiry date | Oct 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/111
Abstract
A power semiconductor device includes a cell region on a semiconductor substrate, at least a transistor device in the cell region, a peripheral termination region encompassing the cell region, a plurality of epitaxial islands arranged around the cell region, and a grid type epitaxial layer in the peripheral termination region. The grid type epitaxial layer separates the plurality of epitaxial islands from one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.