Multi-gate VDMOS transistor and method for forming the same

US9112023B2 · kind B2 · utility

Assignees

• Semiconductor Manufacturing International (Beijing) Corporation · CN
• Semiconductor Manufacturing International (Shanghai) Corporation · CN

Inventor

• Guangyu Sun · Nanhu, CN

Key dates

• Filing date: Mar 12, 2014
• Grant date: Aug 18, 2015
• Expiry date: Mar 12, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/519

Abstract

Various embodiments provide multi-gate VDMOS transistors. The transistor can include a substrate having a first surface and a second surface opposite to the first surface, a drift layer on the first surface of the substrate, and an epitaxial layer on the drift layer. The transistor can further include a plurality of trenches. Each trench can pass through the epitaxial layer and a thickness portion of the drift layer. The transistor can further include a plurality of gate structures. Each gate structure can fill the each trench. The transistor can further include a plurality of doped regions in the epitaxial layer. Each doped region can surround a sidewall of the each gate structure. The transistor can further include a source metal layer on the epitaxial layer to electrically connecting the plurality of doped regions, and a drain metal layer on the second surface of the substrate.