Face detection-processing circuit and image pickup device including the same
US9117110B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2013 |
| Grant date | Aug 25, 2015 |
| Priority date | — |
| Expiry date | Oct 20, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06V40/161
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A face detection-processing circuit includes a down-scaler, a face detection unit, a control unit and a down-scaling ratio controller. The down-scaler is configured to scale down a resolution of an input image including at least one subject person according to a down-scaling ratio to provide a first image. The face detection unit is configured to detect a face of the least one subject person in the first image and generate coordinate information on a region of the detected face part (face region). The control unit is configured to calculate a face detection index indicating a ratio of the face region to the first image based on the coordinate information to provide control signals based on the face detection index and a face detection signal indicating whether a face is detected. The down-scaling ratio controller is configured to adjust the down-scaling ratio in response to the control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.