Gate shift register and flat panel display using the same
US9117512B2 · kind B2 · utility
2Cited by
1References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2012 |
| Grant date | Aug 25, 2015 |
| Priority date | — |
| Expiry date | Feb 16, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/067
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Discussed are a gate shift register and a flat panel display using the same. The flat panel display includes a display panel for displaying an image, a gate driver for driving a plurality of gate lines of the display panel, and a timing controller for outputting a gate start pulse and a plurality of clock pulses each having first to third voltages, to control the gate driver. The gate driver includes a gate shift register for generating scan pulses each having the first to third voltages, using the clock pulses, and supplying the generated scan pulses to the gate lines, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.