Network device with a programmable core
US9118576B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 5, 2012 |
| Grant date | Aug 25, 2015 |
| Priority date | — |
| Expiry date | Sep 24, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/22
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In network device, a plurality of ports is configured to receive and to transmit packets on a network. A packet processing pipeline includes a plurality of hardware stages, wherein at least one hardware stage is configured to output a data structure comprising a field extracted from a received packet based on a first packet processing operation performed on the packet or the data structure, wherein the data structure is associated with the packet. A configurable processor is coupled to the at least one hardware stage of the packet processing pipeline. The configurable processor is configured to modify the field in the data structure to generate a modified data structure and to pass the modified data structure to a subsequent hardware stage that is configured to perform a second packet processing operation on the data structure using the field modified by the configurable processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.