Single photon counting detector system having improved counter architecture
US9121955B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2011 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Mar 31, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/773
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A single photon counting detector system has a layer of photosensitive material and an N×M array of photo-detector diodes. Each photo-detector diode has a bias potential interface and a diode output interface. The bias potential interface is connected to bias potential. An N×M array of high gain, low noise readout unit cells is provided, one readout unit cell for each photo-detector diode. Each readout unit cell has an input interface connected to the diode output interface, a high-gain voltage amplifier with an integration capacitor at least two parallel lines of digital counters, each having a comparator with an individually selectable threshold and a gateable section to determine the counting intervals of the digital counters. A multiplexer allows access to the readout cell unit either on a per pixel basis or for several pixels in parallel to read out the digital counter to a data processor transferring the data off chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.