Thin film transistor display panel and manufacturing method thereof
US9122324B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2012 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Jan 9, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A thin film transistor display panel capable of minimizing a bezel and a manufacturing method thereof are provided. The thin film transistor display panel includes: a substrate; a plurality of gate lines and data lines that cross each other on the substrate; a thin film transistor connected to the gate line and the data line; a pixel electrode connected to the thin film transistor; and a plurality of gate voltage supply lines arranged in a parallel direction with the data lines and connected to the plurality of gate lines, respectively, in which one pixel area is defined by two adjacent gate lines and two adjacent data lines, two pixel electrodes are formed in one pixel area, and the gate voltage supply lines pass between the two pixel electrodes formed in the same pixel area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.