Network processor and energy saving method thereof
US9122479B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2008 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | May 13, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A network processor includes a transceiver circuit, a network data processing unit, and a clock signal control unit. The transceiver circuit transmits and receives a network signal, compares a voltage level of the network signal with a threshold value, outputs a comparison result, and operates under a first clock signal. The network data processing unit is coupled to the transceiver circuit to process the network signal, and operates under a second clock signal different from the first clock signal. The clock signal control unit disables supply of the second clock signal to the network data processing unit when the voltage level is smaller than the threshold value, and enables supply of the second clock signal to the network data processing unit when the voltage level is not smaller than the threshold value. An energy saving method for a network processor is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.