Patent · US Active

Solid state memory with reduced number of partially filled pages

US9122578B2 · kind B2 · utility

3Cited by

3References

12Claims

0Family size

Assignee

Thomson Licensing · FR

Inventors

Oliver Kamphenkel · Lehrte, DE
Michael Drexler · Gehrden, DE
Thomas Brune · Hannover, DE

Key dates

Filing date	Oct 2, 2010
Grant date	Sep 1, 2015
Priority date	—
Expiry date	Jun 22, 2032

Classification

Technology area (CPC G)Physics
CPC primaryG06F2212/7203
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The invention concerns a solid state memory, comprising multiple logical units. The solid state memory contains an internal buffer for temporarily storing the incoming data steam before the incoming data are programmed to at least one page. The internal buffer keeps data that are not yet programmed in case a switch from one logical unit to another is performed. A method for operating such a device is presented.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.