Physical-to-logical address map to speed up a recycle operation in a solid state drive
US9122586B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2013 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Sep 28, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7209
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for increasing performance of a recycle operation in a solid state drive, comprising the steps of (A) creating an empty physical-to-logical address map in a memory having a plurality of entry locations, (B) filling one of the plurality of entry locations with a physical page address associated with each data write operation to a block, where the block has a plurality of pages, (C) writing the physical-to-logical address map to a last of the plurality of pages during a write to a second to last page of the block and (D) initiating a recycle operation of the block by reading the address map to determine whether the pages contain valid data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.