Flash memory device with multi-level cells and method of writing data therein
US9122592B2 · kind B2 · utility
11Cited by
9References
15Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 8, 2014 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Sep 8, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.